Execution Driven Simulation of Shared Memory Multiprocessors [Book Chapter]
Chapter from Fast Simulation of Computer Architectures, eds. Thomas M. Conte and Charles E. Gimarc.
More about this chapter:
Execution driven simulation  is a technique for building fast instruction level computer simulators. It is applicable when the instruction set of the simulation host machine is the same as, or very similar to, that of the machine being simulated. In this chapter we examine three execution driven simulators designed to study shared memory multiprocessors using a uniprocessor as the simulation host machine.
 R. C. Covington et al. The Rice Parallel Processing Testbed. In Proc. 1988 ACM SIGMETRICS, pages 4–11, 1988.
Springer (originally published by Kluwer)
Shared Memory, Basic Block, Original Code, Context Switch, Branch Instruction
Boothe, B. (1995). Execution driven simulation of shared memory multiprocessors. In Conte, T.M. & Gimarc, C.E. (Eds.) Fast simulation of computer architectures (pp. 145-170). Boston: Springer.